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authorBartosz Golaszewski <bartosz.golaszewski@linaro.org>2024-10-07 12:02:57 +0200
committerBjorn Andersson <andersson@kernel.org>2024-10-14 18:52:32 -0500
commitdcf8ef1c8d3046cdbbbe44802a303a94b5bdadcc (patch)
tree8f8090530ca82e06f3c7a207db7926549a816653
parent5a25ef30a84c121fd6ccde39e7e8e41e6e315365 (diff)
arm64: dts: qcom: sa8775p: extend the register range for UFS ICE
The full register range for ICE on sa8775p is 0x18000 so update the crypto node. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20241007-wrapped-keys-dts-v8-3-05ee041f2fc1@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r--arch/arm64/boot/dts/qcom/sa8775p.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 0c95a23aecec..07b3d9f65684 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -2139,7 +2139,7 @@
ice: crypto@1d88000 {
compatible = "qcom,sa8775p-inline-crypto-engine",
"qcom,inline-crypto-engine";
- reg = <0x0 0x01d88000 0x0 0x8000>;
+ reg = <0x0 0x01d88000 0x0 0x18000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
};