diff options
| author | George Moussalem <george.moussalem@outlook.com> | 2025-05-15 21:46:05 +0400 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2025-05-16 16:53:58 +0200 |
| commit | dd26402642a0899fde59ea6b0852fad3d799b4cc (patch) | |
| tree | 9e206f89b9e3fd6f455b66645a597010e195c254 | |
| parent | 56fce75470041b5b0d92ae10637416e1a4cceb1b (diff) | |
mtd: spinand: esmt: fix id code for F50D1G41LB
Upon detecting the ID for the ESMT F50D1G41LB chip, the fifth byte
returned is always 0x00 instead of the expected JEDEC continuation code
of 0x7f. This causes detection to fail:
[ 0.304399] spi-nand spi0.0: unknown raw ID c8117f7f00
[ 0.508943] spi-nand: probe of spi0.0 failed with error -524
So let's revert back to the 4 byte ID code for this chip
specifically.
Fixes: 4bd14b2fd8a8 ("mtd: spinand: esmt: Extend IDs to 5 bytes")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| -rw-r--r-- | drivers/mtd/nand/spi/esmt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/spi/esmt.c b/drivers/mtd/nand/spi/esmt.c index 299d0e507c29..9e286612a296 100644 --- a/drivers/mtd/nand/spi/esmt.c +++ b/drivers/mtd/nand/spi/esmt.c @@ -199,7 +199,7 @@ static const struct spinand_info esmt_c8_spinand_table[] = { SPINAND_FACT_OTP_INFO(2, 0, &f50l1g41lb_fact_otp_ops)), SPINAND_INFO("F50D1G41LB", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f, - 0x7f, 0x7f), + 0x7f), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), NAND_ECCREQ(1, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |