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| author | Arnd Bergmann <arnd@arndb.de> | 2023-01-16 11:05:13 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2023-01-16 11:05:14 +0100 |
| commit | e2f7096f1e76845cfa6e19b54f6f3674925fc28b (patch) | |
| tree | 0e0284aebf382935c9ae7fa4ef335c1efa41deaf | |
| parent | 88bcc6fa5eaea9b4b520c429f806eb87c639909b (diff) | |
| parent | 43d5f5d63699724d47f0d9e0eae516a260d232b4 (diff) | |
Merge tag 'riscv-dt-fixes-for-v6.2-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into arm/fixes
RISC-V DeviceTrees for v6.2
SiFive:
A solitary fix for the PCI memory regions on the unmatched, triggered by
an SM768. No-one must have tried one until just recently!
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-fixes-for-v6.2-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: sifive: fu740: fix size of pcie 32bit memory
Link: https://lore.kernel.org/r/Y78rn+0fVNOxHLKt@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi index 43bed6c0a84f..5235fd1c9cb6 100644 --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi @@ -328,7 +328,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x60080000 0x0 0x60080000 0x0 0x10000>, /* I/O */ <0x82000000 0x0 0x60090000 0x0 0x60090000 0x0 0xff70000>, /* mem */ - <0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x1000000>, /* mem */ + <0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x10000000>, /* mem */ <0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */ num-lanes = <0x8>; interrupts = <56>, <57>, <58>, <59>, <60>, <61>, <62>, <63>, <64>; |