diff options
| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2023-07-05 10:55:18 +0100 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2023-07-06 11:47:28 +0100 |
| commit | ed6dd32c915de3db0315bfa0283e05a508894b5c (patch) | |
| tree | 09a779c034027ff175ee5a027d6bc6138c077756 | |
| parent | e3affc7cd9b48b03d1235168d50c313e2389a2d7 (diff) | |
drm/i915: Remove some dead "code"
Commit 2caffbf11762 ("drm/i915: Revoke mmaps and prevent access to fence
registers across reset") removed the temporary implementation of a reset
under stop machine but forgot to remove this one commented out define.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230705095518.3690951-1-tvrtko.ursulin@linux.intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_reset.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c index 797ea8340467..f81210f11ede 100644 --- a/drivers/gpu/drm/i915/gt/intel_reset.c +++ b/drivers/gpu/drm/i915/gt/intel_reset.c @@ -34,9 +34,6 @@ #define RESET_MAX_RETRIES 3 -/* XXX How to handle concurrent GGTT updates using tiling registers? */ -#define RESET_UNDER_STOP_MACHINE 0 - static void client_mark_guilty(struct i915_gem_context *ctx, bool banned) { struct drm_i915_file_private *file_priv = ctx->file_priv; |