diff options
| author | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2024-06-19 23:45:52 +0200 |
|---|---|---|
| committer | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2024-06-20 19:49:37 +0200 |
| commit | f2800572cc0b01f329fac69646234c64b1ca9576 (patch) | |
| tree | a6345f0e851c4fa4a5f77d3061ace42eae98815b | |
| parent | f20535ce1dd96003e76c958ffaa9c345483d2dfd (diff) | |
drm/xe/vf: Don't change hwe IRQ masks if using memory IRQs
We currently do not support changing the engine interrupt enable
mask on the per-engine basis when using memory based interrupts.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240619214557.905-5-michal.wajdeczko@intel.com
| -rw-r--r-- | drivers/gpu/drm/xe/xe_irq.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c index 8ee3c300c5e4..ab3d5b7a1e8c 100644 --- a/drivers/gpu/drm/xe/xe_irq.c +++ b/drivers/gpu/drm/xe/xe_irq.c @@ -134,6 +134,9 @@ void xe_irq_enable_hwe(struct xe_gt *gt) u32 gsc_mask = 0; u32 heci_mask = 0; + if (IS_SRIOV_VF(xe) && xe_device_has_memirq(xe)) + return; + if (xe_device_uc_enabled(xe)) { irqs = GT_RENDER_USER_INTERRUPT | GT_RENDER_PIPECTL_NOTIFY_INTERRUPT; |