diff options
| author | Svyatoslav Ryhel <clamor95@gmail.com> | 2025-09-06 16:53:23 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2025-09-11 18:03:10 +0200 |
| commit | fc02f529a8dbf617f6d211cb693f56a842b6dbe5 (patch) | |
| tree | aa1f53c7a9d45f1d2f25031f9f1341a1986b09bc | |
| parent | 6b670e53ac6ecd531d90324e9ef87a029d2c98b9 (diff) | |
dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
Tegra30 has CSI pad clock enable bits embedded into PLLD/PLLD2 registers.
Add ids for these clocks. Additionally, move TEGRA30_CLK_CLK_MAX into
clk-tegra30 source.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | drivers/clk/tegra/clk-tegra30.c | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clock/tegra30-car.h | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 82a8cb9545eb..e7ebb63970d3 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -53,6 +53,7 @@ #define SYSTEM_CLK_RATE 0x030 #define TEGRA30_CLK_PERIPH_BANKS 5 +#define TEGRA30_CLK_CLK_MAX 311 #define PLLC_BASE 0x80 #define PLLC_MISC 0x8c diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h index f193663e6f28..763b81f80908 100644 --- a/include/dt-bindings/clock/tegra30-car.h +++ b/include/dt-bindings/clock/tegra30-car.h @@ -271,6 +271,7 @@ #define TEGRA30_CLK_AUDIO3_MUX 306 #define TEGRA30_CLK_AUDIO4_MUX 307 #define TEGRA30_CLK_SPDIF_MUX 308 -#define TEGRA30_CLK_CLK_MAX 309 +#define TEGRA30_CLK_CSIA_PAD 309 +#define TEGRA30_CLK_CSIB_PAD 310 #endif /* _DT_BINDINGS_CLOCK_TEGRA30_CAR_H */ |