summaryrefslogtreecommitdiff
path: root/arch/arc/mm/cache.c
diff options
context:
space:
mode:
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-09-05 08:04:07 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-09-05 08:04:07 +0200
commitfbc1ec2efe665c07c8c71f9f19edb018f7984107 (patch)
treee7df9dac12c640a83ce8859300e061f1f8913ecd /arch/arc/mm/cache.c
parent02baff325462cc7e81241b21959c5e62e7ca575e (diff)
parentc6935931c1894ff857616ff8549b61236a19148f (diff)
Merge 4.8-rc5 into char-misc-next
We want the fixes in here for merging and testing. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arc/mm/cache.c')
-rw-r--r--arch/arc/mm/cache.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c
index 5a294b2c3cb3..0b10efe3a6a7 100644
--- a/arch/arc/mm/cache.c
+++ b/arch/arc/mm/cache.c
@@ -921,6 +921,15 @@ void arc_cache_init(void)
printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
+ /*
+ * Only master CPU needs to execute rest of function:
+ * - Assume SMP so all cores will have same cache config so
+ * any geomtry checks will be same for all
+ * - IOC setup / dma callbacks only need to be setup once
+ */
+ if (cpu)
+ return;
+
if (IS_ENABLED(CONFIG_ARC_HAS_ICACHE)) {
struct cpuinfo_arc_cache *ic = &cpuinfo_arc700[cpu].icache;