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authorOlof Johansson <olof@lixom.net>2014-05-05 13:44:24 -0700
committerOlof Johansson <olof@lixom.net>2014-05-05 13:44:24 -0700
commit15e824dd2261f23cd80c9c65571d445697c84ace (patch)
treeaf8257175d2101b0cda12f8e4432afe8f3f3a50d /arch/arm/mach-shmobile/timer.c
parent89ca3b881987f5a4be4c5dbaa7f0df12bbdde2fd (diff)
parente35db38d66d1e4007cfc1bb90a05e11b4aaee2a8 (diff)
Merge tag 'renesas-soc-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC Updates for v3.16" from Simon Horman: SH Mobile shared SoC code * Add shared shmobile_init_delay() r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs (R-Car Gen2 shared code) * Cache Mode Monitor Register Value r8a7791 (R-Car M2) SoC Check r8a7791 MD21 at SMP boot r8a7790 (R-Car H2) SoC * Make use of r8a7790_add_standard_devices() * Update r8a7791 CPU freq to 1500MHz r8a7778 (R-Car M1) SoC * Move "select RENESAS_INTC_IRQPIN" under SoC emev2 (Emma Mobale EV2) SoC * Remove legacy EMEV2 SoC support * tag 'renesas-soc-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7778/bockw: Move "select RENESAS_INTC_IRQPIN" under SoC ARM: shmobile: Check r8a7791 MD21 at SMP boot ARM: shmobile: rcar-gen2: Cache Mode Monitor Register Value ARM: shmobile: Make use of r8a7790_add_standard_devices() ARM: shmobile: Remove EMEV2 header file ARM: shmobile: Remove legacy EMEV2 SoC support ARM: shmobile: Add shared shmobile_init_delay() ARM: shmobile: Update r8a7791 CPU freq to 1500MHz in C Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-shmobile/timer.c')
-rw-r--r--arch/arm/mach-shmobile/timer.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 62d7052d6f21..ccecde9a3362 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -21,6 +21,7 @@
#include <linux/platform_device.h>
#include <linux/clocksource.h>
#include <linux/delay.h>
+#include <linux/of_address.h>
void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
unsigned int mult, unsigned int div)
@@ -39,6 +40,33 @@ void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
preset_lpj = max_cpu_core_mhz * value;
}
+void __init shmobile_init_delay(void)
+{
+ struct device_node *np, *parent;
+ u32 max_freq, freq;
+
+ max_freq = 0;
+
+ parent = of_find_node_by_path("/cpus");
+ if (parent) {
+ for_each_child_of_node(parent, np) {
+ if (!of_property_read_u32(np, "clock-frequency", &freq))
+ max_freq = max(max_freq, freq);
+ }
+ of_node_put(parent);
+ }
+
+ if (max_freq) {
+ if (of_find_compatible_node(NULL, NULL, "arm,cortex-a8"))
+ shmobile_setup_delay(max_freq, 1, 3);
+ else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
+ shmobile_setup_delay(max_freq, 1, 3);
+ else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a15"))
+ if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
+ shmobile_setup_delay(max_freq, 2, 4);
+ }
+}
+
static void __init shmobile_late_time_init(void)
{
/*