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| author | Eric Huang <JinhuiEric.Huang@amd.com> | 2019-11-05 16:29:57 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-11-06 16:27:48 -0500 |
| commit | f88e2d1f8ec40854c684d73ecf1cf66d4c6dad35 (patch) | |
| tree | b96cf5554d977ce7eeda73cbe42cc0566dc485af /drivers/fpga/fpga-bridge.c | |
| parent | 11c610893410b5d550629ce8d10006fdbc2812b4 (diff) | |
drm/amdgpu: change read of GPU clock counter on Vega10 VF
Using unified VBIOS has performance drop in sriov environment.
The fix is switching to another register instead.
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions