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author | Paloma Arellano <quic_parellan@quicinc.com> | 2024-02-22 11:40:01 -0800 |
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committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-03-04 11:38:51 +0200 |
commit | b40c8377d792cfae38e7b82dca03aae147de6585 (patch) | |
tree | 77ed5a5159737ac7ea7f76075e6a2851f8296850 /drivers/fpga/fpga-mgr.c | |
parent | 21497a463347189b9a144cd513eee9d0ce4de7b6 (diff) |
drm/msm/dpu: modify encoder programming for CDM over DP
Adjust the encoder format programming in the case of video mode for DP
to accommodate CDM related changes.
Changes in v4:
- Remove hw_cdm check in dpu_encoder_needs_periph_flush()
- Remove hw_cdm check when getting the fmt_fourcc in
dpu_encoder_phys_vid_enable()
Changes in v2:
- Move timing engine programming to a separate patch from this
one
- Move update_pending_flush_periph() invocation completely to
this patch
- Change the logic of dpu_encoder_get_drm_fmt() so that it only
calls drm_mode_is_420_only() instead of doing additional
unnecessary checks
- Create new functions msm_dp_needs_periph_flush() and it's
supporting function dpu_encoder_needs_periph_flush() to check
if the mode is YUV420 and VSC SDP is enabled before doing a
peripheral flush
Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/579641/
Link: https://lore.kernel.org/r/20240222194025.25329-17-quic_parellan@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'drivers/fpga/fpga-mgr.c')
0 files changed, 0 insertions, 0 deletions