diff options
| author | Pratyush Yadav <p.yadav@ti.com> | 2020-10-05 21:01:30 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2020-11-09 11:56:16 +0530 |
| commit | 354b412967016e2f99fb2d5113e7b92b539f33b6 (patch) | |
| tree | 1cf7a23c5db9609205c1b9b19d30e0c0b8cd173d /drivers/fpga/fpga-region.c | |
| parent | 6c6a2b2b8ed6dd1ad1a318afd1035777a73936e0 (diff) | |
mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode
Some controllers, like the cadence qspi controller, have trouble reading
only 1 byte in DTR mode. So, do 2 byte reads for SR and FSR commands in
DTR mode, and then discard the second byte.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20201005153138.6437-8-p.yadav@ti.com
Diffstat (limited to 'drivers/fpga/fpga-region.c')
0 files changed, 0 insertions, 0 deletions