diff options
| author | Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com> | 2025-11-03 23:56:25 -0800 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2025-11-20 22:21:16 +0530 |
| commit | bc2ba6e3fb8a35cd83813be1bd4c5f066a401d8b (patch) | |
| tree | bc152ec066a3ce6684cd0c1cd3ea6e8c86af156b /drivers/fpga/xilinx-spi.c | |
| parent | d877f881cec508a46f76dbed7c46ab78bc1c0d87 (diff) | |
phy: qcom-qmp: pcs: Add v8.50 register offsets
The new Glymur SoC bumps up the HW version of QMP phy to v8.50 for PCIE
g5x4. Add the new PCS offsets in a dedicated header file.
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Signed-off-by: Wenbin Yao <wenbin.yao@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
Link: https://patch.msgid.link/20251103-glymur-pcie-upstream-v6-2-18a5e0a538dc@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/fpga/xilinx-spi.c')
0 files changed, 0 insertions, 0 deletions