diff options
| author | Joonas Lahtinen <joonas.lahtinen@linux.intel.com> | 2021-10-22 13:10:02 +0300 |
|---|---|---|
| committer | Joonas Lahtinen <joonas.lahtinen@linux.intel.com> | 2021-10-22 13:10:02 +0300 |
| commit | ef3e619221248a7ea5fc711a2bf9017c94d2f644 (patch) | |
| tree | b69232290b6a3e3d2a26560052c7183ab0ba3c52 /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
| parent | 777226dac058d119286b4081953cb5aa2cb7394b (diff) | |
| parent | 6f2f7c83303d2227f47551423e507d77d9ea01c7 (diff) | |
Merge drm/drm-next into drm-intel-gt-next
Backmerging to pull in the new dma_resv iterators requested by
Maarten and Matt.
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index dc3c6b3a00e5..d58e37fd01f4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -744,6 +744,7 @@ enum amd_hw_ip_block_type { UVD_HWIP, VCN_HWIP = UVD_HWIP, JPEG_HWIP = VCN_HWIP, + VCN1_HWIP, VCE_HWIP, DF_HWIP, DCE_HWIP, @@ -755,10 +756,15 @@ enum amd_hw_ip_block_type { CLK_HWIP, UMC_HWIP, RSMU_HWIP, + XGMI_HWIP, + DCI_HWIP, MAX_HWIP }; -#define HWIP_MAX_INSTANCE 8 +#define HWIP_MAX_INSTANCE 10 + +#define HW_ID_MAX 300 +#define IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv)) struct amd_powerplay { void *pp_handle; @@ -830,6 +836,7 @@ struct amdgpu_device { struct notifier_block acpi_nb; struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS]; struct debugfs_blob_wrapper debugfs_vbios_blob; + struct debugfs_blob_wrapper debugfs_discovery_blob; struct mutex srbm_mutex; /* GRBM index mutex. Protects concurrent access to GRBM index */ struct mutex grbm_idx_mutex; @@ -1078,8 +1085,6 @@ struct amdgpu_device { char product_name[32]; char serial[20]; - struct amdgpu_autodump autodump; - atomic_t throttling_logging_enabled; struct ratelimit_state throttling_logging_rs; uint32_t ras_hw_enabled; @@ -1087,8 +1092,10 @@ struct amdgpu_device { bool no_hw_access; struct pci_saved_state *pci_state; + pci_channel_state_t pci_channel_state; struct amdgpu_reset_control *reset_cntl; + uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE]; }; static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) |