diff options
| author | Christian Bruel <christian.bruel@foss.st.com> | 2025-08-20 09:54:04 +0200 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2025-10-01 09:53:37 -0500 |
| commit | 63a562b33a9c6b4359bfb5a9c7f5d26a85c40fe1 (patch) | |
| tree | 60e6e1086a8fcb71838c8df45d530a602e2d2021 /drivers/pci/controller/dwc/pcie-stm32.h | |
| parent | 5ffa3d2f43a487f60e9f6f692aa8e22251446755 (diff) | |
PCI: stm32: Add PCIe host support for STM32MP25
Add driver for the STM32MP25 SoC PCIe controller based on the DesignWare
PCIe core. Controller supports 2.5 and 5 GT/s data rates, MSI via GICv2m,
Single Virtual Channel, Single Function and WAKE# GPIO.
Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
[mani: reworded description]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: squash error handling cleanup from Christophe JAILLET
<christophe.jaillet@wanadoo.fr>:
https://patch.msgid.link/e69ade3edcec4da2d5bfc66e0d03bbcb5a857021.1759169956.git.christophe.jaillet@wanadoo.fr]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20250820075411.1178729-5-christian.bruel@foss.st.com
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-stm32.h')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-stm32.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-stm32.h b/drivers/pci/controller/dwc/pcie-stm32.h new file mode 100644 index 000000000000..387112c4e42c --- /dev/null +++ b/drivers/pci/controller/dwc/pcie-stm32.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * ST PCIe driver definitions for STM32-MP25 SoC + * + * Copyright (C) 2025 STMicroelectronics - All Rights Reserved + * Author: Christian Bruel <christian.bruel@foss.st.com> + */ + +#define to_stm32_pcie(x) dev_get_drvdata((x)->dev) + +#define STM32MP25_PCIECR_TYPE_MASK GENMASK(11, 8) +#define STM32MP25_PCIECR_LTSSM_EN BIT(2) +#define STM32MP25_PCIECR_RC BIT(10) + +#define SYSCFG_PCIECR 0x6000 |