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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2025-09-13 15:00:48 +0100 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2025-09-13 15:00:48 +0100 |
| commit | 421d4487ef2ead206f57a8950ea9bdd1f7a7b39a (patch) | |
| tree | b679546eeaa70f88b5c8d6caeb79e214efb68121 /drivers/pci/controller/pcie-xilinx.c | |
| parent | 3422b4bc606eee2ba7758ea9347c83332eeec3e3 (diff) | |
| parent | 1b237f190eb3d36f52dffe07a40b5eb210280e00 (diff) | |
Merge tag 'v6.17-rc3' into togreg
Linux 6.17-rc3
Diffstat (limited to 'drivers/pci/controller/pcie-xilinx.c')
| -rw-r--r-- | drivers/pci/controller/pcie-xilinx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/controller/pcie-xilinx.c b/drivers/pci/controller/pcie-xilinx.c index f121836c3cf4..937ea6ae1ac4 100644 --- a/drivers/pci/controller/pcie-xilinx.c +++ b/drivers/pci/controller/pcie-xilinx.c @@ -400,7 +400,7 @@ static irqreturn_t xilinx_pcie_intr_handler(int irq, void *data) if (val & XILINX_PCIE_RPIFR1_MSI_INTR) { val = pcie_read(pcie, XILINX_PCIE_REG_RPIFR2) & XILINX_PCIE_RPIFR2_MSG_DATA; - domain = pcie->msi_domain->parent; + domain = pcie->msi_domain; } else { val = (val & XILINX_PCIE_RPIFR1_INTR_MASK) >> XILINX_PCIE_RPIFR1_INTR_SHIFT; |