diff options
| author | Peter Wang <peter.wang@mediatek.com> | 2025-09-03 10:44:46 +0800 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2025-09-09 22:46:23 -0400 |
| commit | 2936049277ea3bfd38d12583755556290b9ea494 (patch) | |
| tree | 1f3ea3022d3e8c4a70ef3ddf46e70ba34cffe6cc /drivers | |
| parent | 91cad911edd1612ed28f5cfb2d4c53a8824951a5 (diff) | |
scsi: ufs: host: mediatek: Fix device power control
Adjust the timing of device power control to ensure low power mode (LPM)
is entered only after VCC is turned off. Prevent VCCQ/VCCQ2 from
entering LPM prematurely, ensuring proper power management and device
stability.
Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/ufs/host/ufs-mediatek.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 9c07c4abb716..27d244808c31 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -2342,6 +2342,13 @@ skip_phy: host->phy_dev = phy_dev; } + /* + * Because the default power setting of VSx (the upper layer of + * VCCQ/VCCQ2) is HWLP, we need to prevent VCCQ/VCCQ2 from + * entering LPM. + */ + ufs_mtk_dev_vreg_set_lpm(hba, false); + out: of_node_put(phy_node); of_node_put(reset_node); |