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authorPrashanth K <prashanth.k@oss.qualcomm.com>2025-08-26 16:22:54 +0530
committerVinod Koul <vkoul@kernel.org>2025-09-01 18:19:12 +0530
commit616fe247bdce4e3a23e3ded4b3be951001ed8039 (patch)
treedf6e9c90bb4f2da24141473cd99cbe3c9fc2b1f5 /drivers
parent0c5375b06060fa40a8f8ce2e926bde125fdf6c3b (diff)
phy: qcom: m31-eusb2: Fix the error log while enabling clock
While enabling clock, we incorrectly log 'ref clk' as 'cfg ahb clk' Fix this since the devicetree bindings mentions it as ref clock. Signed-off-by: Prashanth K <prashanth.k@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250826105254.3758803-1-prashanth.k@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/phy/qualcomm/phy-qcom-m31-eusb2.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c b/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c
index bf32572566c4..0a0d2d9fc846 100644
--- a/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c
+++ b/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c
@@ -196,7 +196,7 @@ static int m31eusb2_phy_init(struct phy *uphy)
ret = clk_prepare_enable(phy->clk);
if (ret) {
- dev_err(&uphy->dev, "failed to enable cfg ahb clock, %d\n", ret);
+ dev_err(&uphy->dev, "failed to enable ref clock, %d\n", ret);
goto disable_repeater;
}