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| author | Gustavo Pimentel <gustavo.pimentel@synopsys.com> | 2018-07-19 10:32:11 +0200 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2018-07-19 11:33:58 +0100 |
| commit | 4e965ede1856ed62c7ac8b7ad905a4a285e4a9f3 (patch) | |
| tree | 38d418faf5edaac16c3991f8ce09f0d63193ac63 /include/linux/fpga/fpga-bridge.h | |
| parent | 53dd0c51f16be5f215d3ecad435062df99ee29ae (diff) | |
PCI: dwc: Fix EP link notification implementation
Move specific features settings from EP shared code
(pcie-designware-ep.c) to the driver (pcie-designware-plat.c).
Previous implementation disables the EP link notification
by default for all SoCs that uses EP DesignWare IP, which affects
directly the dra7xx and artpec6 SoCs.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'include/linux/fpga/fpga-bridge.h')
0 files changed, 0 insertions, 0 deletions