diff options
| author | Jakub Kicinski <kuba@kernel.org> | 2024-12-09 18:36:05 -0800 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-12-09 18:36:06 -0800 |
| commit | a0e1fc921cb0651cd11469bf5378ec342bf7094d (patch) | |
| tree | 6649189f49aa5ad9b282711b15af5eb2741469ed /include | |
| parent | 32fd46f5b69e9a2e1206d576359e533e5b7c4694 (diff) | |
| parent | 6bc6234cbd5e9f7a4d8a20aa4d5f0c891e099649 (diff) | |
Merge branch 'add-support-for-synopsis-dwmac-ip-on-nxp-automotive-socs-s32g2xx-s32g3xx-s32r45'
Jan Petrous via says:
====================
Add support for Synopsis DWMAC IP on NXP Automotive SoCs S32G2xx/S32G3xx/S32R45
The SoC series S32G2xx and S32G3xx feature one DWMAC instance,
the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII
interface over Pinctrl device or the output can be routed
to the embedded SerDes for SGMII connectivity.
The provided stmmac glue code implements only basic functionality,
interface support is restricted to RGMII only. More, including
SGMII/SerDes support will come later.
This patchset adds stmmac glue driver based on downstream NXP git [0].
[0] https://github.com/nxp-auto-linux/linux
v7: https://lore.kernel.org/20241202-upstream_s32cc_gmac-v7-0-bc3e1f9f656e@oss.nxp.com
v6: https://lore.kernel.org/20241124-upstream_s32cc_gmac-v6-0-dc5718ccf001@oss.nxp.com
v5: https://lore.kernel.org/20241119-upstream_s32cc_gmac-v5-0-7dcc90fcffef@oss.nxp.com
v4: https://lore.kernel.org/20241028-upstream_s32cc_gmac-v4-0-03618f10e3e2@oss.nxp.com
v3: https://lore.kernel.org/20241013-upstream_s32cc_gmac-v3-0-d84b5a67b930@oss.nxp.com
====================
Link: https://patch.msgid.link/20241205-upstream_s32cc_gmac-v8-0-ec1d180df815@oss.nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/phy.h | 23 | ||||
| -rw-r--r-- | include/linux/stmmac.h | 10 |
2 files changed, 29 insertions, 4 deletions
diff --git a/include/linux/phy.h b/include/linux/phy.h index bb157136351e..e597a32cc787 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -298,6 +298,29 @@ static inline const char *phy_modes(phy_interface_t interface) } } +/** + * rgmii_clock - map link speed to the clock rate + * @speed: link speed value + * + * Description: maps RGMII supported link speeds + * into the clock rates. + * + * Returns: clock rate or negative errno + */ +static inline long rgmii_clock(int speed) +{ + switch (speed) { + case SPEED_10: + return 2500000; + case SPEED_100: + return 25000000; + case SPEED_1000: + return 125000000; + default: + return -EINVAL; + } +} + #define PHY_INIT_TIMEOUT 100000 #define PHY_FORCE_TIMEOUT 10 diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index d79ff252cfdc..c9878a612e53 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -33,7 +33,9 @@ #define STMMAC_CSR_20_35M 0x2 /* MDC = clk_scr_i/16 */ #define STMMAC_CSR_35_60M 0x3 /* MDC = clk_scr_i/26 */ #define STMMAC_CSR_150_250M 0x4 /* MDC = clk_scr_i/102 */ -#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/122 */ +#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/124 */ +#define STMMAC_CSR_300_500M 0x6 /* MDC = clk_scr_i/204 */ +#define STMMAC_CSR_500_800M 0x7 /* MDC = clk_scr_i/324 */ /* MTL algorithms identifiers */ #define MTL_TX_ALGORITHM_WRR 0x0 @@ -250,8 +252,8 @@ struct plat_stmmacenet_data { struct clk *stmmac_clk; struct clk *pclk; struct clk *clk_ptp_ref; - unsigned int clk_ptp_rate; - unsigned int clk_ref_rate; + unsigned long clk_ptp_rate; + unsigned long clk_ref_rate; unsigned int mult_fact_100ns; s32 ptp_max_adj; u32 cdc_error_adj; @@ -263,7 +265,7 @@ struct plat_stmmacenet_data { int mac_port_sel_speed; int has_xgmac; u8 vlan_fail_q; - unsigned int eee_usecs_rate; + unsigned long eee_usecs_rate; struct pci_dev *pdev; int int_snapshot_num; int msi_mac_vec; |