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| author | Abel Vesa <abel.vesa@linaro.org> | 2023-02-08 20:00:14 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2023-02-10 22:28:00 +0530 |
| commit | baf172cc04450b9a3845f0f4907c9bc8d717bc58 (patch) | |
| tree | 4994d213db8a1d929d0a355f132ae251cf0dda61 /lib/mpi/mpi-add.c | |
| parent | 354fc6c513ccb459a67c99a57c8d1a837358a001 (diff) | |
phy: qcom-qmp: pcs-pcie: Add v6.20 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for
PCIE g4x2. Add the new PCS PCIE specific offsets in a dedicated
header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230208180020.2761766-6-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'lib/mpi/mpi-add.c')
0 files changed, 0 insertions, 0 deletions