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| author | Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2023-03-07 23:06:39 -0800 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2023-03-16 15:18:02 +0100 |
| commit | ea009e4769fa3bd05d4c111c3b6865eb3a9be829 (patch) | |
| tree | 4848ade1e9a49b721d5e4031c6dea63f3cef320c /lib/mpi/mpi-add.c | |
| parent | 12a7d2cb811dd8a884dea088a2701fcb8d00136e (diff) | |
platform/x86: ISST: Add SST-PP support via TPMI
This Intel Speed Select Technology - Performance Profile (SST-PP) feature
introduces a mechanism that allows multiple optimized performance profiles
per system. Each profile defines a set of CPUs that need to be online and
rest offline to sustain a guaranteed base frequency.
Five new IOCTLs are added:
ISST_IF_PERF_LEVELS : Get number of performance levels
ISST_IF_PERF_SET_LEVEL : Set to a new performance level
ISST_IF_PERF_SET_FEATURE : Activate SST-BF/SST-TF for a performance level
ISST_IF_GET_PERF_LEVEL_INFO : Get parameters for a performance level
ISST_IF_GET_PERF_LEVEL_CPU_MASK : Get CPU mask for a performance level
Once an instance is identified, read or write from correct MMIO
offset for a given field as defined in the specification.
For details on SST PP operations using intel-speed-selet utility,
refer to:
Documentation/admin-guide/pm/intel-speed-select.rst
under the kernel documentation
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Pragya Tanwar <pragya.tanwar@intel.com>
Link: https://lore.kernel.org/r/20230308070642.1727167-6-srinivas.pandruvada@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'lib/mpi/mpi-add.c')
0 files changed, 0 insertions, 0 deletions
