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author | Pawan Gupta <pawan.kumar.gupta@linux.intel.com> | 2024-06-21 17:40:41 -0700 |
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committer | Dave Hansen <dave.hansen@linux.intel.com> | 2025-05-09 13:22:04 -0700 |
commit | 159013a7ca18c271ff64192deb62a689b622d860 (patch) | |
tree | 4abe20827c76dac6f9959c6e71539ade06b32be3 /lib/mpi/mpi-mod.c | |
parent | 1ac116ce6468670eeda39345a5585df308243dca (diff) |
x86/its: Enumerate Indirect Target Selection (ITS) bug
ITS bug in some pre-Alderlake Intel CPUs may allow indirect branches in the
first half of a cache line get predicted to a target of a branch located in
the second half of the cache line.
Set X86_BUG_ITS on affected CPUs. Mitigation to follow in later commits.
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Diffstat (limited to 'lib/mpi/mpi-mod.c')
0 files changed, 0 insertions, 0 deletions