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| author | Sagar Arun Kamble <sagar.a.kamble@intel.com> | 2015-09-12 10:17:51 +0530 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-09-23 10:48:49 +0200 |
| commit | f2d2fe95072acd5404f8051b8bf1195c61a47fb5 (patch) | |
| tree | ed67b30bad8284560b65a478fbab2bb9058bb838 /net/lapb/lapb_out.c | |
| parent | 7a58bad0e63295dfa803973efcebc80cb730c7bd (diff) | |
drm/i915: WaRsDisableCoarsePowerGating
WaRsDisableCoarsePowerGating: Coarse Power Gating (CPG) needs to be
disabled for platforms prior to BXT B0 and SKL GT3/GT4 till E0.
v2: Added GT3/GT4 Check.
Change-Id: Ia3c4c16e050c88d3e259f601054875c812d69c3a
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: Alex Dai <yu.dai@intel.com>
[danvet: Align continuation properly.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'net/lapb/lapb_out.c')
0 files changed, 0 insertions, 0 deletions