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| author | Roger Quadros <rogerq@ti.com> | 2019-03-22 10:58:07 +0200 |
|---|---|---|
| committer | Kishon Vijay Abraham I <kishon@ti.com> | 2019-04-17 14:13:07 +0530 |
| commit | 1d1bae7250758904ab09458022e2d97c23cf42b7 (patch) | |
| tree | e4c8d151baca857511c56254c40ff963071f3fe3 /net/lapb/lapb_subr.c | |
| parent | 9d009d9c20624cd8ed2a3ae0e43752c4a34b4893 (diff) | |
phy: ti-pipe3: Fix PCIe power up sequence
TRM [1] mentions that we need to power up
PCIESS_PHY_TX and PCIESS_PHY_RX before configuring
PCIe_PHY_RX SCP settings.
See "Table 26-81. PCIePHY Subsystem Low-Level Programming Sequence".
[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'net/lapb/lapb_subr.c')
0 files changed, 0 insertions, 0 deletions