diff options
| author | Chris Brandt <chris.brandt@renesas.com> | 2019-05-15 10:20:43 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-05-21 10:25:59 +0200 |
| commit | f756066990607dbe8ea5579c925b48e646891f3e (patch) | |
| tree | e2cb8b70920d5f003621e48ec055eca111ec7628 /net/lapb/lapb_timer.c | |
| parent | 2195e3af9079ea067079e98446ea6a457c81a98c (diff) | |
usb: renesas_usbhs: support byte addressable CFIFO
Some SoC have a CFIFO register that is byte addressable. This means
when the CFIFO access is set to 32-bit, you can write 8-bit values to
addresses CFIFO+0, CFIFO+1, CFIFO+2, CFIFO+3.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions