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| author | John Madieu <john.madieu.xa@bp.renesas.com> | 2025-08-14 17:34:55 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-09-12 11:15:00 +0200 |
| commit | da7326322d31eb60fea27be30ca013d1e9b0a86c (patch) | |
| tree | 5166f1862580fc8ea7cf8453537f5b803b05b03b /rust/helpers/build_bug.c | |
| parent | 00998e5fe0d85798b7d1f30d2ddfd9990cf5d7ef (diff) | |
arm64: dts: renesas: r9a09g047: Enable Tx coe support
The GBETH IPs found on RZ/G3E SoC family are compatible with the stmmac
driver. They have a MAC HW feature register used by this driver to
enable respective features. While the register advertises Tx coe
support, it was not enabled by the driver due to the
'snps,force_thresh_dma_mode' dtsi property.
Switch from 'snps,force_thresh_dma_mode' to 'snps,force_sf_dma_mode' to
enable Tx checksum offload support on both GBETH IPs. While at it, also
switch from 'snps,fixed-burst' to 'snps,mixed-burst' and remove
'snps,no-pbl-x8' for optimal DMA configuration. This improvement
results in a measurable TCP Tx performance gain, increasing throughput
by 20Mbps.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20250814153456.268208-1-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'rust/helpers/build_bug.c')
0 files changed, 0 insertions, 0 deletions