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authorNikhil Rao <nikhil.rao@intel.com>2025-09-30 18:22:26 -0700
committerVinod Koul <vkoul@kernel.org>2025-10-16 17:43:35 +0530
commitf80ea8566917c4bb680911db839a170873e5d17c (patch)
tree4597177600d5e725a0c0dedca35c38a8dc1990cd /rust/helpers/helpers.c
parentbc2c39600212979b6fc836113bde1b707c02f442 (diff)
dmaengine: idxd: drain ATS translations when disabling WQ
There's an errata[1], for the Disable WQ command that it does not guaranteee that address translations are drained. If WQ configuration is updated, pending address translations can use an updated WQ configuration, resulting an invalid translation response that is cached in the device translation cache. Replace the Disable WQ command with a Drain WQ command followed by a Reset WQ command, this guarantees that all ATS translations are drained from the device before changing WQ configuration. [1] https://cdrdv2.intel.com/v1/dl/getcontent/843306 ("Intel DSA May Cause Invalid Translation Caching") Signed-off-by: Nikhil Rao <nikhil.rao@intel.com> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'rust/helpers/helpers.c')
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