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authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>2025-10-23 16:58:08 +0300
committerPhilipp Zabel <p.zabel@pengutronix.de>2025-11-18 17:52:54 +0100
commit819ac6b055350c559dbb111f970a96e2c1c812ff (patch)
tree12c3efc822461b10af7a0e8c9c1bfe87cdb024d6 /rust/helpers/pwm.c
parent78f2d64e484753bfede6a0e9eab0ef35830c34fb (diff)
reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC
The Renesas RZ/G3S SoC USB PHY HW block receives as input the USB PWRRDY signal from the system controller. Add support for the Renesas RZ/G3S SoC. Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'rust/helpers/pwm.c')
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