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authorNicolas Frattaroli <nicolas.frattaroli@collabora.com>2025-10-17 17:31:08 +0200
committerLiviu Dudau <liviu.dudau@arm.com>2025-11-03 15:26:54 +0000
commit12c069e072cf85c67346d1229e231f8e45e99549 (patch)
tree0443bbc2c30e1285f9fcddbd7721e6afc8ec8460 /rust/helpers
parent67934f248e64bdfb13f2a9091019a9d7d9b2980d (diff)
dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant
The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to control the power and frequency of the GPU. This is modelled as a power domain and clock provider. It lets us omit the OPP tables from the device tree, as those can now be enumerated at runtime from the MCU. Add the necessary schema logic to handle what this SoC expects in terms of clocks and power-domains. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://patch.msgid.link/20251017-mt8196-gpufreq-v8-1-98fc1cc566a1@collabora.com Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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