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authorMarc Zyngier <maz@kernel.org>2025-11-20 17:25:29 +0000
committerOliver Upton <oupton@kernel.org>2025-11-24 14:29:14 -0800
commit07bb1c5622a54e2fd3f5c5a86969a2e7ad7f7376 (patch)
treee9da9d4f31fd0aca5461ce2fba5c32fa0ea3384b /rust/kernel/irq/request.rs
parent255de897e7fb918a34845167c572b5bf8e1d9d79 (diff)
KVM: arm64: GICv2: Always trap GICV_DIR register
Since we can't decide to trap the DIR register on a per-vcpu basis, always trap the second page of the GIC CPU interface. Yes, this is costly. On the bright side, no sane SW should use EOImode==1 on GICv2... Tested-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Mark Brown <broonie@kernel.org> Link: https://msgid.link/20251120172540.2267180-40-maz@kernel.org Signed-off-by: Oliver Upton <oupton@kernel.org>
Diffstat (limited to 'rust/kernel/irq/request.rs')
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