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author | Alok Tiwari <alok.a.tiwari@oracle.com> | 2025-07-06 13:11:55 -0700 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2025-09-21 12:56:39 -0700 |
commit | 1624dead9a4d288a594fdf19735ebfe4bb567cb8 (patch) | |
tree | 9f3bc0e6617c9b1df0892e8a499b3faa1189590c /rust/kernel/workqueue.rs | |
parent | 91ec7ad756f103d3a45baac651ea55e4b8c479ca (diff) |
clk: nxp: Fix pll0 rate check condition in LPC18xx CGU driver
The conditional check for the PLL0 multiplier 'm' used a logical AND
instead of OR, making the range check ineffective. This patch replaces
&& with || to correctly reject invalid values of 'm' that are either
less than or equal to 0 or greater than LPC18XX_PLL0_MSEL_MAX.
This ensures proper bounds checking during clk rate setting and rounding.
Fixes: b04e0b8fd544 ("clk: add lpc18xx cgu clk driver")
Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
[sboyd@kernel.org: 'm' is unsigned so remove < condition]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'rust/kernel/workqueue.rs')
0 files changed, 0 insertions, 0 deletions