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| author | Stephen Boyd <sboyd@kernel.org> | 2025-09-21 09:56:03 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2025-09-21 09:56:03 -0700 |
| commit | 1803012a8929213b1abb9a46fc92de3674187085 (patch) | |
| tree | 24c01fcc28b8f32f613be1c1619d3d90bea80944 /rust/kernel/xarray.rs | |
| parent | 8f5ae30d69d7543eee0d70083daf4de8fe15d585 (diff) | |
| parent | 652b08afba69d5d26fe91098eb832b1bcc0f91c2 (diff) | |
Merge tag 'clk-microchip-6.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip
Pull Microchip clk driver updates from Nicolas Ferre:
- add one clock for sam9x75
- new meaning for MCR register field in clk-master
- use force-write to PLL update register to ensure
reliable programming sequence
- update Analog Control Register (ACR) management to accommodate
differences across SoCs.
- ACR management dependency with one ARM PM patch added beforehand
* tag 'clk-microchip-6.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: remove default values for PMC_PLL_ACR
clk: at91: add ACR in all PLL settings
clk: at91: sam9x7: Add peripheral clock id for pmecc
clk: at91: clk-master: Add check for divide by 3
clk: at91: clk-sam9x60-pll: force write to PLL_UPDT register
ARM: at91: pm: save and restore ACR during PLL disable/enable
Diffstat (limited to 'rust/kernel/xarray.rs')
0 files changed, 0 insertions, 0 deletions