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| author | Cristian Birsan <cristian.birsan@microchip.com> | 2024-11-21 17:47:17 +0200 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@microchip.com> | 2025-09-17 19:15:32 +0200 |
| commit | bfa2bddf6ffe0ac034d02cda20c74ef05571210e (patch) | |
| tree | 91da5f1127574bd7eac68c4e349e1a4395b48c44 /rust/kernel/xarray.rs | |
| parent | 94a1274100e397a27361ae53ace37be6da42a079 (diff) | |
clk: at91: add ACR in all PLL settings
Add the ACR register to all PLL settings and provide the correct
ACR value for each PLL used in different SoCs.
Suggested-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
[nicolas.ferre@microchip.com: add sama7d65 and review commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Diffstat (limited to 'rust/kernel/xarray.rs')
0 files changed, 0 insertions, 0 deletions