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| author | Christian Bruel <christian.bruel@foss.st.com> | 2025-04-28 14:06:59 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-04-29 18:16:28 +0200 |
| commit | 06c231fe953a26f4bc9d7a37ba1b9b288a59c7c2 (patch) | |
| tree | 7ef45c97e37eefaaa45e003561b9f1467b5a158b /scripts/extract-fwblobs | |
| parent | de2b2107d5a41a91ab603e135fb6e408abbee28e (diff) | |
arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp25 SoCs
Adjust the size of 8kB GIC regions to 128kB so that each 4kB is mapped 16
times over a 64kB region.
The offset is then adjusted in the irq-gic driver.
see commit 12e14066f4835 ("irqchip/GIC: Add workaround for aliased GIC400")
Fixes: 5d30d03aaf785 ("arm64: dts: st: introduce stm32mp25 SoCs family")
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20250415111654.2103767-3-christian.bruel@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'scripts/extract-fwblobs')
0 files changed, 0 insertions, 0 deletions