diff options
| author | Vadim Pasternak <vadimp@nvidia.com> | 2023-08-22 11:34:37 +0000 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2023-08-23 17:31:27 +0200 |
| commit | 55e31928f30eae90cbd26cbffaa1208c69397e1f (patch) | |
| tree | 1e6940268eeec70149c3f5310e51a3e223cce03f /scripts/gdb/linux/interrupts.py | |
| parent | 4d54f55a4db34fa8fad104a20c64ec9cb2408e10 (diff) | |
platform: mellanox: Add field upgrade capability register
Add new register to indicate the method of FPGA/CPLD field upgrade
supported on the specific system.
Currently two masks are available:
b00 - field upgrade through LPC gateway (new method introduced to
accelerate field upgrade process).
b11 - field upgrade through CPU GPIO pins (old method).
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Michael Shych <michaelsh@nvidia.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20230822113451.13785-3-vadimp@nvidia.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'scripts/gdb/linux/interrupts.py')
0 files changed, 0 insertions, 0 deletions