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| author | Quentin Schulz <quentin.schulz@cherry.de> | 2025-02-18 12:49:19 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2025-02-23 00:44:37 +0100 |
| commit | 83c247e2bc1bb7bde2e54ab3767421e22a06ff77 (patch) | |
| tree | 48b8a967577970c1359334c623c62c18eb51143b /scripts/gdb/linux/interrupts.py | |
| parent | f65f71a4c33706146ca81822ed08319d6740d343 (diff) | |
arm64: dts: rockchip: enable I2C3 in Haikou carrierboard, not Ringneck DTSI
PX30 Ringneck only exposes I2C3 as LVDS_BLC_CLK/DAT on Q7 golden fingers
but nothing is on that bus on the SoM itself. Therefore, let's enable
the I2C3 bus where it makes sense, in the Haikou carrierboard DTS.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250218-tsd-align-haikou-v1-8-5c44d1dd8658@cherry.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'scripts/gdb/linux/interrupts.py')
0 files changed, 0 insertions, 0 deletions