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authorBiju Das <biju.das.jz@bp.renesas.com>2024-12-16 19:53:12 +0000
committerGeert Uytterhoeven <geert+renesas@glider.be>2025-01-03 21:04:44 +0100
commit5c7fb203d0dbfbfeed51991a4f98499b245634a7 (patch)
tree6c091335d31fc2a577d40a67f3789e8f484ba70a /scripts/gdb/linux/modules.py
parent25458fdd39a18a5ce00c36f38992da54bb7453f3 (diff)
dt-bindings: pinctrl: renesas: Document RZ/G3E SoC
Add documentation for the pin controller found on the Renesas RZ/G3E (R9A09G047) SoC. The RZ/G3E PFC is similar to the RZ/V2H SoC but has more pins(P00-PS3). Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241216195325.164212-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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