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authorBiju Das <biju.das.jz@bp.renesas.com>2024-12-03 10:49:36 +0000
committerGeert Uytterhoeven <geert+renesas@glider.be>2024-12-13 11:19:37 +0100
commit9977754eeebed749a071492d98e46700307c0bd1 (patch)
treefca6e995b3a1925b8218c607a180e31d18648e1f /scripts/gdb/linux/modules.py
parent6977c89b4db7739aeaa5bd3989a2b5208e2805e7 (diff)
arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC
Add the initial DTSI for the RZ/G3E SoC. The files in this commit have the following meaning: - r9a09g047.dtsi: RZ/G3E family SoC common parts - r9a09g047e57.dtsi: RZ/G3E R0A09G047E{4,5}{7,8} SoC specific parts - r9a09g047e37.dtsi: RZ/G3E R0A09G047E{2,3}{7,8} SoC specific parts Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-10-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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