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| author | Ian Rogers <irogers@google.com> | 2024-02-13 17:18:15 -0800 | 
|---|---|---|
| committer | Namhyung Kim <namhyung@kernel.org> | 2024-02-16 15:28:24 -0800 | 
| commit | 176e66715d0ea5ccf65b36b411d760ab18a0de4a (patch) | |
| tree | 0b101400c0a3f62b91007b17f6d53093ef0b4b87 /scripts/gdb/linux/timerlist.py | |
| parent | 74f76c3ba7d5a68fac8fa1f711433742c8870807 (diff) | |
perf vendor events intel: Update sandybridge TMA metrics to 4.7
Top-Down Microarchitecture Analysis (TMA) metrics simplify
cycle-accounting using microarchitecture-abstracted metrics
organized in one hierarchy. This update is from version 4.5 to
4.7.
The update includes:
 - Add metrics tma_fp_vector_128b, tma_fp_vector_256b and
   tma_info_system_cpus_utilized.
 - Remove metrics tma_info_system_mem_parallel_requests,
   tma_info_system_core_frequency and
   tma_info_system_mem_request_latency.
 - Swapped tma_info_core_ilp (becomes per SMT thread) and
   tma_info_pipeline_execute (per physical core).
 - Tuned thresholds for tma_fetch_bandwidth.
The update came from:
https://github.com/intel/perfmon/pull/140
https://github.com/intel/perfmon/pull/138
Running the script:
https://github.com/intel/perfmon/blob/main/scripts/create_perf_json.py
Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Perry Taylor <perry.taylor@intel.com>
Cc: Samantha Alt <samantha.alt@intel.com>
Cc: Weilin Wang <weilin.wang@intel.com>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20240214011820.644458-27-irogers@google.com
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