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author | Palmer Dabbelt <palmer@rivosinc.com> | 2025-05-08 09:40:21 -0700 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2025-05-08 09:40:21 -0700 |
commit | 01534f3e0dd75e27ed03e5542f0c7bf6aa7130f1 (patch) | |
tree | 40bce945112ae5dd72edf24f2d951b2e27c765f6 /scripts/gdb/linux/utils.py | |
parent | 92a09c47464d040866cf2b4cd052bc60555185fb (diff) | |
parent | 7f1c3de1370bc6a8ad5157336b258067dac0ae9c (diff) |
Merge tag 'riscv-fixes-6.15-rc6' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into fixes
riscv fixes for 6.15-rc6
- A fix to handle compressed halfword load/store instructions misaligned accesses
- A fix to allow user memory access while handling a misaligned access
- 2 fixes to return an error if the pointer masking extension is not implemented on the platform but userspace still tries to access it, which caused oops on some early platforms
- A fix to prevent the stripping of .rela.dyn so that a vmlinux loaded by kexec can successfully boot
* tag 'riscv-fixes-6.15-rc6' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux:
riscv: Disallow PR_GET_TAGGED_ADDR_CTRL without Supm
scripts: Do not strip .rela.dyn section
riscv: Fix kernel crash due to PR_SET_TAGGED_ADDR_CTRL
riscv: misaligned: use get_user() instead of __get_user()
riscv: misaligned: enable IRQs while handling misaligned accesses
riscv: misaligned: factorize trap handling
riscv: misaligned: Add handling for ZCB instructions
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions