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author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2025-04-15 14:08:54 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-05-05 10:50:10 +0200 |
commit | 5488aa013e9ef17c4c7aa8c4e6166dd89c69c3c6 (patch) | |
tree | 0859496c65b682424275f52f6516614e5b910535 /scripts/gdb/linux/utils.py | |
parent | 0af2f6be1b4281385b618cb86ad946eded089ac8 (diff) |
pinctrl: renesas: rzg2l: Add support for RZ/V2N SoC
Add pinctrl support for the Renesas RZ/V2N SoC by reusing the existing
RZ/V2H(P) pin configuration data. The PFC block is nearly identical, with
the only difference being the absence of `PCIE1_RSTOUTB` on RZ/V2N.
To handle this, the rzv2h_dedicated_pins array is refactored into a common
and pcie1 subset. This enables reuse of the common portion across both
SoCs, while excluding PCIE1_RSTOUTB for RZ/V2N.
This change allows the pinctrl-rzg2l driver to support RZ/V2N without
duplicating large parts of the RZ/V2H configuration.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250415130854.242227-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions