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| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2023-05-02 19:06:17 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-05-08 09:14:33 +0200 |
| commit | 7f91fe3a71aa43700eac2650e3b01d50cbbb6f48 (patch) | |
| tree | 33e157e3b3db8f5cb318930c78b126bcc46b05e7 /scripts/gdb/linux/utils.py | |
| parent | ac9a78681b921877518763ba0e89202254349d1b (diff) | |
clk: renesas: r8a779a0: Add PWM clock
Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20230502170618.55967-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions