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authorRaviteja Narayanam <raviteja.narayanam@xilinx.com>2023-02-02 15:11:31 +0530
committerWolfram Sang <wsa@kernel.org>2023-02-03 17:33:43 +0100
commit813eac4fcb839bdf22aacfda0f2713fe50a82974 (patch)
tree78a6ca7001767ad87c4d756eaedd5504c0c9f22c /scripts/gdb/linux/utils.py
parentacea4e4458b40af5df22de1659de618f0ced0ce8 (diff)
i2c: xiic: Fix Rx and Tx paths in standard mode
repeated start When a combined message request comes from user space, the controller has to initiate repeated start sequence. In standard mode, this repeated start sequence is corrupted if there is still data in the Tx FIFO. So, always make sure that all the bytes are completely transmitted out of the FIFO by waiting for TXEMPTY, if the previous message is of Tx type. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
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