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authorNikola Cornij <nikola.cornij@amd.com>2020-02-26 14:53:54 -0500
committerAlex Deucher <alexander.deucher@amd.com>2020-03-09 13:49:34 -0400
commit8cc426d79be1c360f2cc53a469a9eb7c737ccad9 (patch)
tree2869fb9da9364e385f49aff5664fbeb963fe5334 /scripts/gdb/linux/utils.py
parent4c631826e0bcfaefe580faeb4ef6651e5ebe57c1 (diff)
drm/amd/display: Program DSC during timing programming
[why] Link or DIG BE can't be exposed to a higher stream bandwidth than they can handle. When DSC is required to fit the stream into the link bandwidth, DSC has to be programmed during timing programming to ensure this. Without it, intermittent issues such as black screen after S3 or a hot-plug can be seen. [how] Move DSC programming from enabling stream on link to timing setup. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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