diff options
author | Sunil V L <sunilvl@ventanamicro.com> | 2023-05-15 11:19:20 +0530 |
---|---|---|
committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-06-01 08:45:07 -0700 |
commit | 914d6f44fc50744163e9bba7178644231f77a46a (patch) | |
tree | 3522924f1940be6bf80b6d691e897f92063f999d /scripts/gdb/linux/utils.py | |
parent | ce92546cd63779445d205e3153defedacf8b08c6 (diff) |
RISC-V: only iterate over possible CPUs in ISA string parser
During boot we call riscv_of_processor_hartid() for each hart that we
add to the possible cpus list. Repeating the call again here is not
required, if we iterate over the list of possible CPUs, rather than the
list of all CPUs.
The call to of_property_read_string() for "riscv,isa" cannot fail
either, as it has previously succeeded in riscv_of_processor_hartid(),
but leaving in the error checking makes the operation of the loop more
obvious & provides leeway for future refactoring of
riscv_of_processor_hartid().
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Co-developed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20230515054928.2079268-14-sunilvl@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions