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author | Alvin Lee <Alvin.Lee2@amd.com> | 2023-04-27 15:10:13 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-05-11 01:08:25 -0400 |
commit | b504f99ccaa64da364443431e388ecf30b604e38 (patch) | |
tree | e33836c7dbd865e487157d91661a7f27ad6d6466 /scripts/gdb/linux/utils.py | |
parent | f57fa0f23d9707747272b0d09af8b93b19cf8ee4 (diff) |
drm/amd/display: Enforce 60us prefetch for 200Mhz DCFCLK modes
[Description]
- Due to bandwidth / arbitration issues at 200Mhz DCFCLK,
we want to enforce minimum 60us of prefetch to avoid
intermittent underflow issues
- Since 60us prefetch is already enforced for UCLK DPM0,
and many DCFCLK's > 200Mhz are mapped to UCLK DPM1, in
theory there should not be any UCLK DPM regressions by
enforcing greater prefetch
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions