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authorVille Syrjälä <ville.syrjala@linux.intel.com>2025-04-01 19:37:49 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-04-10 20:15:04 +0300
commitefaa1177c31be89483dfd3919348b3535f602b5e (patch)
tree472604ec7ab8af8cdbf11898797d6d36c0db01ad /scripts/gdb/linux/vmalloc.py
parentd35b913f0e1cb003b658827f5a900d648b092c5b (diff)
drm/i915: Apply the combo PLL frac w/a on DG1
DG1 apparently needs the combo PLL fractional divider w/a with 38.4 MHz refclk as well. This isn't listed in bspec, but looking at the hsd it looks like it was possibly just missed due to no one having a DG1 around at the time. This gives us slightly more accurate clocks on DG1. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250401163752.6412-2-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'scripts/gdb/linux/vmalloc.py')
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