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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-04-10 21:52:26 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2023-06-10 06:46:12 -0700 |
| commit | 38e27a6fbf2206b18417c5985dbcdeca0f2026b8 (patch) | |
| tree | 3915f90b697e592058c83ec88348144651df3838 /scripts/generate_rust_analyzer.py | |
| parent | 635455260d06b5189bdf9b400d591fabd9ef90b2 (diff) | |
drm/msm/a6xx: don't set IO_PGTABLE_QUIRK_ARM_OUTER_WBWA with coherent SMMU
If the Adreno SMMU is dma-coherent, allocation will fail unless we
disable IO_PGTABLE_QUIRK_ARM_OUTER_WBWA. Skip setting this quirk for the
coherent SMMUs (like we have on sm8350 platform).
Fixes: 54af0ceb7595 ("arm64: dts: qcom: sm8350: add GPU, GMU, GPU CC and SMMU nodes")
Reported-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # SM8450 HDK
Patchwork: https://patchwork.freedesktop.org/patch/531562/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions