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| author | Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> | 2025-06-14 01:01:44 +0530 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2025-06-18 14:58:34 -0700 |
| commit | 3d77a3280da9ef96e2f8281e43b2cec18f142160 (patch) | |
| tree | 6d3c9ea78c74256b7d709460a4d97be62862f093 /scripts/generate_rust_analyzer.py | |
| parent | 0085d49d30124a3b0cfd04357d22588815c5563b (diff) | |
drm/i915/xe3lpd: Extend DMC load path for display
Display version 30.02 should be treated the same as other Xe3 IP.
So exteding DMC load path the condition for it.
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20250613193146.3549862-8-dnyaneshwar.bhadane@intel.com
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions