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| author | Niravkumar L Rabara <niravkumar.l.rabara@intel.com> | 2024-12-04 14:32:54 +0800 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2024-12-16 18:54:31 -0600 |
| commit | 3f7c869e143acfd41ccfdda1ffe8b97dae71449b (patch) | |
| tree | 9cc2b471f376d443db35b140f2a5de9e48c5613e /scripts/generate_rust_analyzer.py | |
| parent | 8b87f3e333f4b0633d4c02c23e1615220a8eb643 (diff) | |
arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id
Add gpio0 controller node and correct DMA handshake ID for SPI
tx and rx channels.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions